From Newsgroup: comp.sys.cbm

Lorenzo J. Lucchini wrote:

I was wondering if it could be possible to configure one or both the Commodore One's FPGAs so that they act as the main CPU.

AFAIK, yes, that's possible. It is certainly possible with the smaller
FPGA as...

1) There might not be nearly enough space on them for that

... the 6502 that controls the start-up actually runs on that, so there
is more than enough space.

2) They might not have access to the buses a CPU requires (RAM,
namely)

They have.

3) I've read someone that the smaller FPGA is reprogrammable, which
seemed to imply that the other is not

No, they are both reprogrammable, and are in fact programmed at every start-up. However, they can only be reprogrammed as a whole, and as
(AFAIK) the larger FPGA acts as a memory, video and sound controller in
what is planned to be the "C-1 native mode", reprogramming it on the fly
could be a bit tricky.

Regards,
Michael
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From Newsgroup: comp.sys.cbm

"Lorenzo J. Lucchini" <ljlbox@tiscalinet.it> wrote in message news:1f24a1b2.0307010443.7bae7000@posting.google.com...

I was wondering if it could be possible to configure one or both the Commodore One's FPGAs so that they act as the main CPU.
The problems I can see with this are:
1) There might not be nearly enough space on them for that

The little 30k FPGA has a modified 6502, plus IDE, plus the video driver,
plus a bunch of other stuff in it, so I'd think you could stuff a fairly featureful CPU into the 100k. :)

2) They might not have access to the buses a CPU requires (RAM,
namely)

AFAIR, both do.

3) I've read someone that the smaller FPGA is reprogrammable, which
seemed to imply that the other is not

The 30k has a default config from a ROM on the motherboard. This then loads
up your custom 100k config from the boot device. After boot, you can
reprogram the 30k at will, so both can have custom code on it. As far as hot-programming the 100k during runtime, I think you need to defer that
through the 30k, though it's quite doable.

--
White Flame (aka David Holz)
http://www.white-flame.com/
(spamblock in effect)



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From Newsgroup: comp.sys.cbm

Michael J. Schülke <news0306@mjschuelke.de> wrote in message news:<MPG.196ba545a9915fc798973d@News.CIS.DFN.DE>...

Lorenzo J. Lucchini wrote:

[snip]

No, they are both reprogrammable, and are in fact programmed at every start-up. However, they can only be reprogrammed as a whole, and as
(AFAIK) the larger FPGA acts as a memory, video and sound controller in
what is planned to be the "C-1 native mode", reprogramming it on the fly could be a bit tricky.

First, thank you and David Holz for your replies.

What I was thinking of is about doing the closest thing to "designing
my own computer" without messing with actual hardware.
So I don't really care much about losing the built-in memory access,
video and audio functionalities, as long as I can design my own
instead (which are probably going to be much simpler, like no audio
and simplicistic video).

But I wonder: I've read in more than one place that the C1 has a CPU
slot where you'll be able to plug various CPU modules (6502, Z80,
etc.). Why do it this way if you can just write the bitstream on an
FPGA?
Or have I got it all wrong?

Lastly, how big of a CPU do you think you could squeeze in the FPGAs
while mantaining basic (video, memory) I/O capabilities?

by LjL
ljlbox@tiscalinet.it
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From Newsgroup: comp.sys.cbm

"Lorenzo J. Lucchini" <ljlbox@tiscalinet.it> wrote in message news:1f24a1b2.0307011436.3ce93053@posting.google.com...

What I was thinking of is about doing the closest thing to "designing
my own computer" without messing with actual hardware.
So I don't really care much about losing the built-in memory access,
video and audio functionalities, as long as I can design my own
instead (which are probably going to be much simpler, like no audio
and simplicistic video).

I think a lot of us want it for that purpose, too. :)

But I wonder: I've read in more than one place that the C1 has a CPU
slot where you'll be able to plug various CPU modules (6502, Z80,
etc.). Why do it this way if you can just write the bitstream on an
FPGA?

Because then you have a lot more room on the FPGAs to do other fun stuff.
And you don't have to design your own CPU.

Lastly, how big of a CPU do you think you could squeeze in the FPGAs
while mantaining basic (video, memory) I/O capabilities?

No idea. You'd just have to start designing the VHDL and see how many gates
it compiles into. Things like non-iterative multiplies and divides would probably take up a large portion of the CPU.

--
White Flame (aka David Holz)
http://www.white-flame.com/
(spamblock in effect)


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From Newsgroup: comp.sys.cbm

ljlbox@tiscalinet.it (Lorenzo J. Lucchini) wrote in news:1f24a1b2.0307010443.7bae7000@posting.google.com:

I was wondering if it could be possible to configure one or both the Commodore One's FPGAs so that they act as the main CPU.
The problems I can see with this are:
1) There might not be nearly enough space on them for that
2) They might not have access to the buses a CPU requires (RAM,
namely)
3) I've read someone that the smaller FPGA is reprogrammable, which
seemed to imply that the other is not

Is any of these correct? And, am I missing other possible problems?
As far as point 1 is concerned, I'm not thinking about a *big* CPU.

by LjL
ljlbox@tiscalinet.it

Yes, actually during the early startup process and mode selection. The
BootROM written by MV is apparently written to the 6502 variant developed
by Jeri Ellsworth. (Nicknamed the 65JE02 or 65J02 aka Drive CPU). This is loaded into the 30K LE FPGA chip. From my understanding, it also operates
the IDE drives and the Sound. This CPU is the master CPU until selections
are made and then the 65c816 ("factory" socketed) or whatever CPU is in
the CPU slot via a CPU card (if the 65c816 is unsocketed from the 44 pin socket) will become the main CPU. This is a CPU switch over process.

I would assume both FPGAs can be the main CPU whenever it has control
over the bus. In theory, it may be possible but I doubt in parellel in
anyway.

I can not answer with 100% confidence whether the 100K LE FPGA is
configured to be reprogrammable but I think it is.

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From Newsgroup: comp.sys.cbm

"White Flame \(aka David Holz\)" <whiteflame52@y.a.h.o.o.com> wrote in news:bdu233$n1a$1@barad-dur.nas.com:

I think a lot of us want it for that purpose, too. :)

Because then you have a lot more room on the FPGAs to do other fun
stuff. And you don't have to design your own CPU.

No idea. You'd just have to start designing the VHDL and see how many
gates it compiles into. Things like non-iterative multiplies and
divides would probably take up a large portion of the CPU.

Without video, depends on design but the CPU slot can also have an FPGA
on a card designed for the bus. If I recall correctly, if you had the
money, you can purchase yourself a 1M LEs FPGA chip and solder it to a
PCB board designed for the CPU slot. If you did that, you can save
yourself alot of LEs on the onboard FPGAs to do other fun video and sound stuff and leave the CPU stuff to a dedicated FPGA chip. This way, you can
be free to do alot of other fun stuff as well. Depending on design, one
may even have a local bus of some sort for some really fun stuff. I'll
leave it that.

FPGAs can be had for $30-40. The more LEs, the higher the price. So if
you want to build your own CPUs on an FPGA, check out Altera (for
example) and you can get your very own and design yourself a PCB board.

I think it will be fun. Anyway guys, have fun.


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